Interrupt enable register.
| RXOVERRUNINTEN | Enable for interrupt trigger on receive buffer overrun or descriptor underrun situations. |
| RXERRORINTEN | Enable for interrupt trigger on receive errors. |
| RXFINISHEDINTEN | Enable for interrupt triggered when all receive descriptors have been processed i.e. on the transition to the situation where ProduceIndex == ConsumeIndex. |
| RXDONEINTEN | Enable for interrupt triggered when a receive descriptor has been processed while the Interrupt bit in the Control field of the descriptor was set. |
| TXUNDERRUNINTEN | Enable for interrupt trigger on transmit buffer or descriptor underrun situations. |
| TXERRORINTEN | Enable for interrupt trigger on transmit errors. |
| TXFINISHEDINTEN | Enable for interrupt triggered when all transmit descriptors have been processed i.e. on the transition to the situation where ProduceIndex == ConsumeIndex. |
| TXDONEINTEN | Enable for interrupt triggered when a descriptor has been transmitted while the Interrupt bit in the Control field of the descriptor was set. |
| RESERVED | Unused |
| SOFTINTEN | Enable for interrupt triggered by the SoftInt bit in the IntStatus register, caused by software writing a 1 to the SoftIntSet bit in the IntSet register. |
| WAKEUPINTEN | Enable for interrupt triggered by a Wake-up event detected by the receive filter. |
| RESERVED | Unused |